eMMC Host Controller

eMMC Host Controller

iW-eMMC Controller interfaces MMC / eMMC card to any processor with a generic interface. The interface towards the MMC card is realized by the MMC protocol implemented in the controller. The core supports AXI4-Lite interface for the control and status register access and AXI4-MM interface for data transfer through ADMA2 mode.



Xilinx Evaluation Kit

Intel Evaluation Kit

Mircochip Evaluation Kit


    • Compliant with eMMC Specification Version 4.41
    • Supports 1-bit,4-bit and 8-bit eMMC modes
    • Supports Card Detection input pin
    • Supports Card Write Protection input pin
    • Supports programmable clock frequency generation to the eMMC card
    • Supports Interrupt and ADMA2 transfer mode of operation
    • Individual 2Kbyte data buffer for read and write
    • Cyclic Redundancy Check (CRC) for command and data
    • Supports timeout monitoring for response, data, CRC token & busy
    • Supports a maximum block length of 2K-byte
    • Supports both single block and multi block data transfer
    • Supports power ON/OFF control to SD/eMMC card
    • Supports Default speed (26Mhz), High speed (52Mhz) mode


  • Compliant with eMMC specification version 4.41
  • Controller provides a simple slave interface for control & status access and master interface for DMA data transfer

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