ARINC 818-2 IP Core

ARINC 818-2 IP Core

iWave’s ARINC IP core is ARINC818–2 compliant, which can be implemented on any transceiver-based FPGA device. It can be used for both transmit-and-receive applications. This core supports simple streaming interface to interface with video & image processing IP cores supported by FPGA vendors.

Downloads

Xilinx Evaluation Kit

Intel Evaluation Kit

Mircochip Evaluation Kit

Specification

    • IP Compliant to ARINC818-2 specification
    • Video TX and RX interface: Simple Streaming Interface
    • Custom data transmission & reception during video blanking period
    • Transmission Medium
      • Optical or
      • 75-ohm, 100-ohm or 150-ohm Copper
    • Link Rate Supported
      • FC 1x, 2x, 3x, 5x, 6x, 8x & 12x
    • Video Resolution Supported
      • Resolution up to 4K @ 60fps
    • Video Type
      • Progressive Scan
      • Interlaced
    • Pixel Format supported
      • Monochrome
      • RGB
      • YcbCr
      • RGBA
    • Pixel Aspect ratio supported.
      • 1:1
      • 1:1.2
      • 1.2:1
      • NTSC (approx 8:9)
      • PAL (16:15)
    • Frame Rate supported.
      • 15fps
      • 20fps
      • 24
      • 24 * 1000 / 1001
      • 25 (PAL)
      • 30
      • 30 * 1000 / 1001 (29.97 NTSC)
      • 60
      • 50
      • 60 * 1000 / 1001 (59.94 NTSC)
      • 50 (VESA DMT)
      • 60 (VESA DMT)
      • 75 (VESA DMT)
      • 85 (VESA DMT)
      • 50 (VESA CVT)
      • 60 (VESA CVT)
      • 75 (VESA CVT)
      • 85 (VESA CVT)
    • Pixel Table Number supported
      • 8-bit Components, four components per transmission word
    • Pixel Array Order supported
      • Left to Right, Top to Bottom
    • Line Synchronous Mode supported
    • User configurable parameters as per ICD requirement
      • No. Of rows
      • No. Of Columns
      • Video Format Code
      • Pixel Aspect Ratio
      • Video Frame rate
      • Color Information Code

HIGHLIGHTS

  • Quick customization as per customer’s Interface Control Document (ICD) and deliver the same within 3-4 weeks’ timeline.
  • Our IP core is not limiting the maximum resolution support and it completely depends on FPGA transceiver speed

Copyright © 2020 iWave Systems Technologies Pvt. Ltd.