Processing System (PS/Processor)

• Quad-core ARM Cortex-A53 MPCore @1.5GHz
• Dual-core ARM Cortex-R5 MPCore @600MHz
• Arm Mali-400MP2 GPU

Programming Logic (PL/FPGA)

• Upto 747K Logic cells & 341K LUTs
• High Speed GTH Transceivers x 16 (Upto 16.3Gb/s)

• PS: 64bit, 4GB DDR4 RAM with ECC (Expandable upto 8GB)
• PL/FPGA: 16bit, 1GB DDR4 RAM (Expandable upto 2GB)

• 8GB eMMC Flash for boot & storage (expandable up to 128GB)
• EEPROM (4Kbit)

   

• Gigabit Ethernet PHY Transceiver (PTP supported)
• USB2.0 PHY Transceiver
• 6 Output programable clock synthesizer

• PS GTR Transceiver Lanes x 2 (Up to 6.0Gb/s)
• Gigabit Ethernet x 1 Port (through On-SOM Gigabit Ethernet PHY)
• USB2.0 OTG x 1 Port (through On-SOM USB2.0 transceiver)
• SD (4bit) x 1
• Debug UART & Data UART x 1
• SPI x 1
• I2C x 2 Port
• JTAG x 1

• High Speed GTH Transceiver Lanes x 4 (Up to 16.3Gbps)
• HP Bank IOs – 48 LVDS/96 Single Ended IO’s
• ADC Input pins – Up to 32 Differential/Single Ended from HP Banks