8237 DMA

8237 DMA

8237 DMA Controller is a peripheral core for microprocessor systems. It controls data transfer between the main memory and the external systems with limited CPU intervention.

Downloads

Xilinx Evaluation Kit

Intel Evaluation Kit

Mircochip Evaluation Kit

Specification

    • 24-bit length address register
    • 16-bit length count register
    • 4 independent DMA channels
    • 4 clock / 1 bus cycle
    • Byte transfer / word transfer selectable
    • Three transfer modes
      • Single transfer mode
      • Demand transfer mode
      • Block transfer mode
    • Two bus modes
      • Bus release mode
      • Bus hold mode
    • DMA request Maskable on an individual channel basis
    • Software DMA request in uPD1037 mode
    • Auto initialization function
    • Transfer address incrementing/decrementing
    • Two kinds of channel priority order
      • Fixed priority
      • Rotating priority
    • TC_N output at the end of transfer
    • Forced service termination by END_N input
    • Cascading capability
    • I/O – memory and memory – I/O transfer capability

HIGHLIGHTS

  • Compatible with 8237 and uPD71071
  • The controller can improve the system performance by allowing external devices to transfer data directly to or from system memory
  • Multi-mode programmability allows the user to select from three different transfer modes

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