Agilex 9 Direct RF 3U VPX

Agilex 9 Direct RF 3U VPX

iW-RainboW-G67V®

  • Agilex 9 SoC FPGA R17B Package – AGRW014 Device
  • Quad-core 64-bit ARM® Cortex®-A53 up to 1.4GHz
  • 8GB DDR4 for HPS, 8GB DDR4 for FPGA
  • 32GB eMMC Flash and 128MB QSPI Flash
  • ADC x 4 & DAC x 4 with sampling rate up to 64Gsps
  • Up to 1,437,240 Logic elements
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Agilex 9 Direct RF

CPU
  • Agilex 9 AGRW014 Device with Single F-Tile and A-Tile.
  • Quad-core 64-bit ARM® Cortex®-A53 up to 1.4GHz
  • Up to 1,437,240 Logic elements
  • 16 x FGT Transceivers up to 58Gbps PAM4
  • ADC x 4 & DAC x 4; Sampling rate up to 64Gsps
Memory & Storage
  • 32GB eMMC Flash (Upgradable).
  • 1Gb QSPI Flash (Upgradable).
  • 8GB DDR4 for HPS with ECC (64bit + 8bit) (Upgradable)
  • 8GB DDR4 for FPGA with ECC (64bit + 8bit) (Upgradable)
  • 2Kb EEPROM (Upgradable)
Other Features
  • Gigabit Ethernet Header for HPS
  • USB2.0 Type-C OTG for HPS
  • 3-pin Debug UART Header
  • On Board Clock Generators
  • Temperature Sensor x1
  • Elapse Counter x1

3U VPX Backplane Features

3U VPX Connector (P0+P1A)
  • Data Plane 1 Flat Pipe
    • DP01[3:0] – 40G Ethernet
  • Data Plane 1Ultra-Thin Pipe
    • DPutp01 – 1G Ethernet
  • Control Plane 1Ultra-Thin Pipe
    • CPutp01 – 1G Ethernet
  • Utility Plane
    • System Control Signals (SYSRESET, NVMRO, SYS_CON, SM Bus, Geographic Address Field, JTAG)
    • MP01
    • System Reference Clocks (REF_CLK, AUX_CLK)
    • Bussed GPIO (GDiscrete1)
    • Power Input (12V VDC, 3.3V_AUX, VBAT)
3U VPX Connector (P1B+P2A)
  • Expansion Plane Port
    • EP[7:0] – PCIe Gen3 x8
    • EP[15:8] – Connected to FPGA IOs x32
    • System Control Signals (Maskable Reset)
    • MP02
    • CLK1 or GPIO
Aperture Pattern J – P2B (10 NanoRF + 1MT Hybrid)
  • 4 Fiber Optical Transceiver using one Firefly Connector
  • 4 Analog-to-Digital RF Output to VPX Backplane (@ sampling rate up to 64 Gsps)
  • 4 Digital-to-Analog RF Input to VPX Plug-in-Module (@ sampling rate up to 64 Gsps)
  • Trigger signal input from backplane
  • 10MHz RF synchronization clock from backplane to LMK

High Speed Network

  • 32GB eMMC Flash for Boot & 1GB QSPI Configuration flash
  • Micro SD Slot

General Specification

Power Input

+12VDC +/- 5% input from VPX Connector

Operating Temperature

-40°C to +85°C

Form Factor

3U VPX (160mm X 100mm)

Module Profile as per AMPS

MODA3p-16.6.13-1-4-F2C-(E8-E1) (P3D – 16G2) (E1) (N-G2) [E12]

Slot Profile

SLT3-PAY-1F1U1S1S1U1U4F1J-14.6.13-n

Slot Pitch

1 inch Conduction Cooled

Module Profile as per AMPS

MOD3A-16.6.13-1-x-(E8-E1)(4P3U-4P3U)(E1)[E12]

BSP Support

Linux / Quartus

Environment Specification

RoHS3 & REACH Compliant

Custom Design Sevices

iWave provides end-to-end ODM services, from concept to production, leveraging our in-house expertise in hardware design, software development, FPGA design, and mechanical enclosure design. The FPGA expertise at iWave includes RTL, high speed bus interface and transceivers, storage, video, networking, and high-speed ADC/DAC with the entire product lifecycle, from initial concept to mass production and ongoing support.

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