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Serial FPDP IP Core

Serial Front Panel Data Port (sFPDP) is an industry standard, low-overhead, low-latency, high speed serial communications protocol. sFPDP is ideal for use in applications such as Radar, Range & Telemetry Systems, High Speed Data Acquisition, High Resolution Video Storage Applications, Digital Receivers, Spectrum and Transient Analysis. sFPDP overcomes the major limitation of the Parallel FPDP which is limited link connection distance – not more than 5 meters, & is capable of covering up to 10 Kilometres using appropriate optical transceiver and fibre optic cable. The simple and lightweight nature of the protocol also makes it an attractive choice for replacement of parallel bus interconnects using transceiver technology.
iWave has been closely working with the customers worldwide to satisfy their design and development needs. iWave’s sFPDP IP core found perfect stage to showcase its utilization and has been a part of major applications. iWave’s development of the sFPDP IP core has been meeting the market demands ever since.

IP Validation and Performance Testing:
iWave’s sFPDP IP is Compliant with ANSI/VITA 17.1-2003 Serial FPDP standard. The IP is designed by keeping the transceiver interface open for the user, meaning the IP does not include specific device transceiver, giving liberty to the user to generate and manage device specific transceiver settings. This enables users to select any FPGA device which is capable of supporting the specified data rates. The transceiver connection ports match the physical interface signals of transceivers, in major FPGA devices, to simplify the integration to either.

The IP has been rigorously tested and validated for its performance. Validation and testing is performed on variety of platforms, some are mentioned below:

iWave provides the reference design which can be used to validate the functionality & performance of the sFPDP IP. The sFPDP link speed does not get limited due to the IP, it is independent of the IP protocol and instead the sFPDP link can run at any data rate supported by the device specific transceiver.
The testing was conducted on above platforms using different methodologies some of which are shown below:


A. In this method, Altera development kits providing an HSMC connector loopback card is used, where in Tx and Rx signals are looped back the hence the IP’s design is tested.
B. In this method, Xilinx Evaluation kits having an optical SFP module are used and using optical loopback cables the IP’s design is tested.
C. In this method Altera & Xilinx kits having a SMA connector for Tx and Rx were used where external SMA-SMA cables are used to complete the loopback.
D. In this method, board to board testing is done over an optical link.


IP Deliverables: Following are the deliverables provided for the IP.

  • Design Document
  • RTL Source Code or Device Specific Net list
  • Test Bench
  • IP User Guide

For implementation details and features supported by the IP, please follow the link: http://www.iwavesystems.com/serial-fpdp-sfpdp.html

Jayesh Tanwani
Member Technical (FPGA)
iWave Systems Technologies Pvt. Ltd.