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SDIO Slave Controller



SDIO Slave controller facilitates the design of SDIO cards and reduces the development time. By using this IP core, customers no longer need to spend time on handling the SD bus protocol since such function is provided by the core

SDIO Slave Controller (FPGA IP Cores)

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  • SDIO Slave Controller (FPGA IP Cores)
  • Controller handles SD bus protocol on the card interface and provides simplified interface to user logic
  • Controller handle all the housekeeping tasks by itself without user logic intervention
  • Compliant with SD Physical Specification Version 3.00 and SDIO Specification Version 3.00
  • Supports 1-bit and 4bit SD modes
  • Supports SDIO Interrupt feature
  • Supports all mandatory SDIO Commands/Response types
    • SPI Mode: CMD0, CMD5, CMD52, CMD53, CMD59
    • SD Mode: CMD0, CMD3, CMD5, CMD7, CMD52, CMD53
  • CRC7 checking/generation for Command/Response
  • CRC16 checking/generation for Data transfer
  • Supports SDR12, SDR25, SDR50 and SDR104** Mode of operation
  • Supports only 1.8V or 3.3V SDIO Voltage. SDIO voltage switching is not supported
  • Data Transfer in Multi Byte and Multi Block mode using CMD53
  • 8-bit Wishbone interface with constant burst, Wishbone Specification- B3 supported
  • Function0 and Function1 supported
  • SDIO only implementation, Combo card features are not supported
  • Optional Code Storage Area (CSA) is not supported
  • Suspend/Resume Features not supported
  • DDR50 mode is not supported

** IP Supports SDR50 and SDR104 mode. Please contact us to check the SDR50 and SDR104 mode support in target device.

  • Portable devices: PDA,GPS,GPRS and etc.
  • RF Reader
  • Design Document
  • Verilog RTL or Netlist Source code
  • Test Bench
  • IP User Guide

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