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FPGA IP Cores

iWave is a leading FPGA design house with a wide range of FPGA IP Cores. The Design House caters to multiple customers across the globe by customizing and integrating the IPs, thereby reducing the effort, time to market and cost factors. iWave has a bundle of well tested and proven FPGA IP cores, which include Intel 80186 compatible Processor & peripheral cores, bus interfaces cores, video/multimedia cores, and storage cores. All the FPGA IP cores provide the standard and simple user interface for ease of use.


All the IP cores are optimized for leading FPGA’s and delivered with full documentation, VHDL/Verilog synthesizable RTL or optimized netlist for leading FPGA’s, VHDL/Verilog/SystemVerilog testbench for simulation and example design with IP user manual for system integration.

iWave upgrades all IP portfolios on a regular basis to cater to the market requirements. In addition to IP cores, we offer FPGA Design Services and Board development for the complete realization of solutions. For any more information please contact mktg@iwavesystems.com


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  • PCIe to SD/MMC Bridge (FPGA IP Cores)

    PCIe to SD/MMC Bridge

    Rs0.00

    iW-PCIe to SD/MMC Bridge is the IP core which converts the PCIe to SD or MMC bus interface

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  • VME Slave IP Core

    VME Slave IP Core (VME to AXI Bus Bridge)

    Rs0.00

    The ANSI/VITA 1.0-1994 or VME64 specification establishes a framework for 8-, 16-, and 32-bit parallel bus computer architectures that can implement single and multiprocessor systems. The VMEbus specification defines an interfacing system used to interconnect microprocessors, data storage, and peripheral control devices in a closely coupled hardware configuration.

    iWave’s IP is compliant to ANSI/VITA1.0-1994 and implements the slave configuration of VMEbus data transfer layer consisting of the Data Transfer Bus and the Priority Interrupt Bus modules. This IP can be considered as a VME to AXI bus bridge and can be implemented in any FPGA having interface to a VME Bus Interface.

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  • FMC Add-On Card 1

    FMC Add-On Cards

    Rs0.00

    iWave’s FPGA-IP Evaluation Add-On FMC Card is designed to meet ANSI/VITA 57.1 FMC Standard. The card supports both High-Pin Count (HPC) & Low-Pin Count (LPC) connector and can be used in an air-cooled environment. FPGA-IP Evaluation Add-On Card can be interfaced with most of the FPGA development kits available in the market. This card also helps to evaluate iWave’s proprietary FPGA Intellectual Property (IP) Cores.

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  • PCIe-ISA Bridge (FPGA IP Cores)

    PCIe-ISA Bridge

    Rs0.00

    PCIe to ISA bridge is an IP core that converts PCIe to the ISA master bus interface.

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  • PCIe to UART Bridge (FPGA IP Cores)

    PCIe to UART Bridge

    Rs0.00

    PCIe to UART bride is a IP core which converts PCIe to UART bus interface

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  • 80186XL Processor (FPGA IP Cores)

    80186XL Processor

    Rs0.00

    The 80186XL is a powerful 16-bit microprocessor core, executes instruction list compatible with 80186XL microprocessor. The 80186XL core has a broad set of integrated peripherals, which helps reduce system development time and cost and is compatible with wide range of compilers and debuggers. The design along with multiple peripherals can be fit into single FPGA.

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  • 80188XL Processor (FPGA IP Cores)

    80188XL Processor

    Rs0.00

    The 80188XL is a powerful 16-bit microprocessor core, executes instruction list compatible with 80188XL microprocessor. The 80188XL core has a broad set of integrated peripherals, which helps reduce system development time and cost and is compatible with wide range of compilers and debuggers. The design along with multiple peripherals can be fit into single FPGA.

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  • 80188EB Processor (FPGA IP Cores)

    80188EB Processor

    Rs0.00

    The 80188EB is a powerful 16-bit microprocessor core, executes instruction list compatible with 80188EB microprocessor. The 80188EB core has a broad set of integrated peripherals, which helps reduce system development time and cost and is compatible with wide range of compilers and debuggers. The design along with multiple peripherals can be fit into single FPGA.

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