iWave Japan      Welcome to iWave Systems

PCIe to SD/MMC Bridge



iW-PCIe to SD/MMC Bridge is the IP core which converts the PCIe to SD or MMC bus interface

PCIe to SD/MMC Bridge (FPGA IP Cores)

Mouse over the image for zoom

More Views

  • PCIe to SD/MMC Bridge (FPGA IP Cores)
  • Compliant with SD Host Controller Standard Specification Version 2.0
  • Compliant with SD Physical Layer Specification Version 2.0
  • Compliant with eMMC Specification Version 4.41
  • Supports 1-bit,4-bit SD/eMMC modes and 8-bit eMMC modes.
  • Supports SD Card Detection input pin
  • Supports SD Card Write Protection input pin
  • Supports programmable clock frequency generation to the SD/eMMC card.
  • Supports Interrupt and ADMA2 transfer mode of operation.
  • Individual 2Kbyte data buffer for read and write.
  • Cyclic Redundancy Check (CRC) for command and data.
  • Supports timeout monitoring for response, data, CRC token & busy.
  • Supports a maximum block length of 2K-byte.
  • Supports both single block and multi block data transfer.
  • Supports power ON/OFF control to SD/eMMC card.
  • Supports Gen1 x1 PCIe link for host processor interface
  • Embedded and industrial applications development
  • Consumer and Server applications
  • Design Document
  • Verilog RTL or Net list Source code
  • Test Bench
  • IP User Guide

Get a Quote

* Required Fields

Powered by WebForms