Internship
Internship
For M.Tech (VLSI/FPGA) final year students
Qualification: Final year students of M.Tech in the following streams with a minimum of 65% throughout the education
- Good knowledge in Verilog, VHDL languages
- Digital Design and Knowledge
- Familiar with various FPGA Architectures
- Familiar with AXI Stream, Lite and memory mapped protocols.
Duration of the project: 6-12 months
Job Type: Full-time
Job Location: Bangalore, Karnataka
If you believe you have the right talent and skills to join our team, please e-mail us your resume with the relevant details to career@iwavesystems.com