Arria 10 FPGA SOM

Arria 10 FPGA SOM

iW-RainboW-G24M®(アイ・ダブリュー・レインボウ・ジー24エム

  • Arria 10 FPGA device compatibility (GX270, GX320, GX480, GX570, GX660, GX900, GX1150)
  • With upto 1150K Logic Elements and 24 High Speed transceivers
  • 4-GB DDR4 RAM (64bit) & 2-GB DDR4 RAM for FPGA
  • 24 high-speed transceivers @ 17.4Gbps
  • 48/96 LVDS from BANK 3B & 3C and 93 SE from BANK 2A & 3A
  • Dual 240 Pin Board to Board Connector
  • Variable IO voltage support from PMIC
  • Industrial Grade operation
  • 10年以上の長寿

モジュールの特徴について:

  • 対応Arria10 FPGAファミリ - GX270、GX320、GX480、GX570、GX660、GX900、GX1150
    • 最大1150K ロジック素子
    • 高速トランシーバー x 24 @ 17.4 Gbps
  • 2-GB DDR4 RAM (32bit) from FPGA
  • 4-GB DDR4 RAM (64bit) from FPGA (only in GX480 or higher family devices)
  • Configuration Flash for FPGA
  • Other On SOM features
    • JTAGヘッダー
    • 5V-FAN Header
    • FPGA AS Header
    • FPGA Configuration Selection Switch

2つの240ピン高速基板対基板コネクタ・インターフェース

From connector 1 interface
  • FPGA High Speed Transceivers (upto 17.4Gbps) x 16
  • FPGA IOs & General Purpose Clocks – Bank2A
    • Up to 21 LVDS/46SE IOs
    • One General Purpose Clock Input LVDS Pair/Single Ended
    • Two General Purpose Clock Output LVDS Pairs/Single Ended
  • FPGA IOs & General Purpose Clocks – Bank3A
    • Up to 22 LVDS/47SE IOs
    • Two General Purpose Clock Input LVDS Pairs/Single Ended
    • Two General Purpose Clock Output LVDS Pairs/Single Ended
From connector 2 interface
  • Gigabit Ethernet x 1 Port (through On-SOM Gigabit Ethernet PHY from Bank2L IOs)
  • USB OTG x 1 Port (through On-SOM USB ULPI PHY from Bank2L IOs)
  • Upto 20 Single-Ended IOs
  • FPGA AS Interface (Optional)
  • FPGA High-Speed Transceivers (up to 17.4Gbps) x 8
  • FPGA IOs & General Purpose Clocks – Bank3B
    • Up to 24 LVDS IOs/48SE IOs
    • Two General Purpose Clock Input LVDS Pairs/Single Ended
    • Two General Purpose Clock Output LVDS Pairs/Single Ended
  • FPGA IOs & General Purpose Clocks – Bank3C
    • Up to 24 LVDS IOs/48SE IOs
    • Two General Purpose Clock Input LVDS Pairs/Single Ended
    • Two General Purpose Clock Output LVDS Pairs/Single Ended
  • JTAG Interface

一般的な特徴

電源入力

5V

動作温度

-40°C ~ +85°C

フォームファクター

75mm x 95mm

BSPサポート

Linux BSP:- Linux 5.4/Quartus 21.3

環境仕様

RoHS &REACH対応

コンプライアンス

CE*

開発キット - デュアルFMC

Arria 10 SOC FPGA SOMと開発キットの斜視図
  • Gigabit Ethernet through RJ45MagJack x 1
  • USB2.0 OTG through Micro AB connector x 1
  • Debug UART through USB Micro AB connector x 1
  • SFP+コネクターによる10Gイーサネット
  • PCIe Gen3 x 1 コネクター
  • デュアルPMODコネクター
  • デュアル FMC ハイピンカウント (HPC) コネクター
  • SDI Video IN through HD BNC Connector x 1
  • SDI Video Out through HD BNC Connector x 1
  • M.2 SATA Connector x 1
  • USB3.0 TypeC connector x 1
  • Display Port Connector x 1
  • Clock Synthesizer/Generator
  • 16-Bit IO Expander
    JTAG Connector x 1
    20 Pin GPIO Header x 1
  • RTC Coin Cell Holder
    Power ON/OFF DIP Switch x 1
  • Reset Push button Switch x 1
  • Power Supply : DC 12V, 5A Power Input Jack
  • フォームファクター: 130mm x 140mm

Custom Design Sevices

iWave provides end-to-end ODM services, from concept to production, leveraging our in-house expertise in hardware design, software development, FPGA design, and mechanical enclosure design. The FPGA expertise at iWave includes RTL, high speed bus interface and transceivers, storage, video, networking, and high-speed ADC/DAC with the entire product lifecycle, from initial concept to mass production and ongoing support.

サーマルソリューション

iWaveはArria10 SoC FPGA SOMのヒートシンクとファンシンクのソリューションをサポートしています。

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