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80188XL Processor



The 80188XL is a powerful 16-bit microprocessor core, executes instruction list compatible with 80188XL microprocessor. The 80188XL core has a broad set of integrated peripherals, which helps reduce system development time and cost and is compatible with wide range of compilers and debuggers. The design along with multiple peripherals can be fit into single FPGA.

80188XL Processor (FPGA IP Cores)

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  • 80188XL Processor (FPGA IP Cores)
  • Quick migration of 80188XL based designs to an FPGA platform
  • Replacement for 80188XL processor and ASICs
  • 80188XL CPU Core

    • Multiplexed 20-bit address and 8-bit data bus
    • 1M-byte memory space divided into 4 segments
    • 64K-byte IO space
    • Non Maskable Interrupt support
    • Arithmetic-Logic Unit

  • CPU On-Chip Peripherals

    • Programmable Timer / Counter Unit

      • Three programmable independent 16-bit timers
      • Internal / external input clock selectable

    • Direct Memory Access Unit

      • Two independent high-speed DMA channels
      • Data can be transferred between any combination of memory & IO space
      • DMA transfer can be initiated by external, internal request or by direct programming
      • Both byte & word transfer is possible in case of 80186XL
  • Interrupt Control Unit

    • Four external interrupt request inputs (INT0 to INT3).
    • Timer0, Timer1, Timer2 and DMA0, DMA1 Interrupts (Internal Interrupts)
    • Edge or level triggered interrupt request inputs
    • Cascade with external 8259A interrupts (only on INT0 and INT1) operates in either Master mode or Slave mode.
    • Special fully nested mode support

  • Chip Select Unit

    • Thirteen programmable chip-select outputs
    • Six of the chip-selects map only into memory address space, while the remaining seven can map into either memory or I/O address space
    • Memory or I/O bus cycle decoder
    • Programmable wait-state generator

  • Clock Generator
  • Typical processor applications such as industrial, Automotive, Medical etc.
  • Legacy platforms with obsolete components can be converted to new FPGA board

Please contact [email protected]

  • Design Document
  • Verilog RTL or Netlist Source code
  • Test Bench
  • IP User Guide

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