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Core Benefits
- Helps in designing in SDIO card
Core Applications
- Portable devices: Cell phone, PDA, GPS, GPRS and etc.
- Consumer electronic and security devices
Deliverables
- Design document
- RTL Verilog synthesizable code
- Verification environment
- Detailed user guide
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iW-SDIO Slave Controller
iW-SDIO Slave controller acts as a bridge core of SDIO to UART. It also facilitates the design of SDIO cards and reduces the development time. By using this IP core, customers no longer need to spend time on handling the SD bus protocol since such function is provided by the core
Features
- Compliant with SD Physical Specification Version 2.00 and SDIO Specification Version 2.00
- SPI, 1-bit and 4bit SD modes
- Supports SDIO Interrupt feature
- Supports all mandatory SDIO Commands/Response types
- SPI Mode : CMD0, CMD5, CMD52, CMD53, CMD59
- SD Mode : CMD0, CMD3, CMD5, CMD7, CMD52, CMD53
- CRC7 checking/generation for Command/Response
- CRC16 checking/generation for Data transfer
- Data Transfer in Multi Byte and Multi Block mode using CMD53
- 8 GPIO lines supported through Function0
- UART 16550 function features:
- Programmable baud generator divides any input clock by 1 to (216 - 1) and generates the 16x clock
- Hardware Handshaking signals (CTS, RTS)
- 5, 6, 7, or 8-bit characters
- Even, odd, or no-parity bit generation and detection
- 1, 1/2, or 2-stop bit generation
- Baud generation (DC to 1.5M baud)
- Line break generation and detection
- Independently controlled transmit, receive, line status, and data set interrupts
For further details, contact mktg@iwavesystems.com
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