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SD Memory Slave Controller


Rs0.00

Overview

The SD Memory Slave controller is designed to reside within SD Memory card. This slave controller provides simple and general-purpose 8-bit interface to user application. This controller handles the SD bus protocol on the card interface side and forwards only the data transfer requests to user logic interface.

SD Memory Slave Controller (FPGA IP Cores)

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  • SD Memory Slave Controller (FPGA IP Cores)
  • Core handles SD bus protocol on the card interface and provides simplified interface to user logic
  • Core handle all the housekeeping tasks by itself without user logic intervention
  • Supports both the standard and High capacity operation
  • Compliant with SD Physical Specification Version 2.00
  • Supports 1-bit and 4-bit SD Mode
  • Supports Standard and High Capacity operations
  • Supports Default and High Speed Modes of operation
  • Supports all mandatory slave registers set
  • CID Register fields are configurable through header file
  • Supports only Standard command set
  • Supports all mandatory SD Command Classes
  • CRC7 checking/generation for Command/Response
  • CRC16 checking/generation for Data transfer
  • Support Maximum block length of 512 bytes
  • Supports Single and Multiple block read and write data transfer
  • Supports Partial and Misalign Block length option
  • SD Memory only implementation
  • IP provides simple and general-purpose 8-bit interface to user application
  • Combo card features are not supported
  • SPI Mode is not supported
  • Portable devices: Cellphone, PDA and etc.
  • SOC design integration with SD memory card
  • Design Document
  • Verilog RTL or Netlist Source code
  • Test Bench
  • IP User Guide

 

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