The SATA Host Core is available for integration into host FPGA designs to provide an industry- compliant SATA 1.5-Gbps and SATA 3.0-Gbps interface. Serial ATA (SATA) are computer bus standards that have the primary function of transferring data (directly or otherwise) between the FPGA and mass storage devices such as hard disk.
iW-SDXC Host controller is compatible with the SD Physical Layer specification V3.0. The core supports 32 bit AHB LITE Host interface working at SOC interface frequency. The Host interface is compatible with the standard register set for the host controller as per SD host controller specification Version 3.0.
The SD Memory Slave controller is designed to reside within SD Memory card. This slave controller provides simple and general-purpose 8-bit interface to user application. This controller handles the SD bus protocol on the card interface side and forwards only the data transfer requests to user logic interface.
SDIO Slave controller facilitates the design of SDIO cards and reduces the development time. By using this IP core, customers no longer need to spend time on handling the SD bus protocol since such function is provided by the core