sFPDP IP Core is based on ANSI/VITA 17.1-2003 Standards. This IP core provides a relatively simple protocol using maximum available data throughput with a minimum protocol for point-to-point data links. sFPDP links support a wide range of physical interfaces with the most common option being 2.5 gigabits per second multimode fiber.
PCI Controller provides an interface between the PCI bus and user interface. PCI core interface is processor independent, enabling an efficient transition to future processor generations and use with multiple processors.
iWave provides the user application for PCI-e target bridge to access the control & status registers of custom logic and data transfers to custom logic. In addition multi-channel scatter gather DMA core provides the hardware assisted high speed data transfers between the PCI-e and custom logic. This IP core simplifies the integration of PCI-e hard macro controller with custom logic.