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POC- Rear View Camera


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Overview

This technical Note describes the system description of Rear View Camera and FPGA implementation in this. Rear View Camera is an Automotive System that allows the drivers to safely view objects behind the vehicle through Camera, Marvell 88W8688 WLAN chipset and the LCD display. This system also supports DVD features for in-vehicle entertainment.

POC- Rear View Camera

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  • POC- Rear View Camera
  • Camera Capture Interface Module: This module implements the logic which interfaces to a camera sensor and captures data.
  • RBC & JPEG Encoder Module: This module implements a high-performance image encoder that complies with baseline ISO/IEC 10918-1 JPEG standard. This module also includes the Raster-to-Block conversion.
  • Framer/De-Framer Module: This module implements the logic required to decode the packet received by from the 8688 and decide whether it is JPEG stream or control packet. It also encodes the JPEG stream data to be sent to 8688.
  • SDIO Host Module: This module is responsible for communicating with the 8688 Wi-Fi SoC through the SDIO interface.
  • Wrapper Module: This module is responsible to do read/write of registers of different modules trough control interface. It also does the JPEG Encoder/Decoder configuration using the configuration stream received from 8688. This module communicates with Framer/De-Framer using DPRAM.
  • SDRAM Controller Module: This module implements the logic required for doing read/write from/to the SDRAM.
  • JPEG Decoder & BRC Module: This module implements a high-performance image or video decoder that complies with baseline ISO/IEC 10918-1 JPEG standard. This module also includes the Block-to-Raster conversion.
  • 1 sec boot up time (power-on to 1st frame transmit)
  • 33 ms frame delay (from 1st pixel from Camera to receive on LCD)
  • 802.11a and 11b/g operation
  • Max. WVGA (800x480) <=60 fps M-JPEG inline codec. Also support 640x480, 320x240
  • Support for digital camera sensors (YUV 4:2:2 progressive input)
  • Support for analog camera sensors (NTSC interlaced).
  • Support for digital LCDs (YUV 4:2:2 progressive output and RGB upto 888)
  • Support for analog displays (NTSC interlaced)
  • Control of camera and display parameters over I2C
  • Synchronized video and audio.
  • Applications where the external interface signals of the host processor need to be interfaced with the Multibus interface.

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