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Features
- Compatible to 8237
- 24-bit length address register
- 16-bit length count register
- 4 independent DMA channels
- 4 clock / 1 bus cycle
- Byte transfer / word transfer selectable
- Supports three transfer modes (Single, Demand, Block)
- Two bus modes (Bus release, Bus hold)
- DMA request maskable on an individual channel basis
- Software DMA request in uPD1037 mode
- Auto initialization function
- Two kinds of channel priority order (Fixed & Rotating)
- Casacding capability
Deliverables:
- Design document
- RTL Verilog synthesizable code
- Verification environment
- Detailed user guide
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iW-DMA Controller
iW-DMA Controller is a peripheral core for microprocessor systems. It controls data transfer between the main memory and the external systems with limited CPU intervention.
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Core Benefits
- Uses to reduce the load of the CPU
- Configurable for ease of use
For further details, contact mktg@iwavesystems.com |
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